Usually, cryptographic computations constitute a heavy bottleneck for almost any common processor unit. In order to overcome this drawback, new dedicated processors have been developed. By aiming mainly to accelerate the cryptographic operations and off-load the cryptographic workload from the main functionality of a processor, these processors achieve a much better performance at a low-per-watt power consumption. By embedding dedicated acceleration mechanisms into a common processor chip, the hardware once again is proved to be incomparable faster from any software approach. At the moment, there is a number of existing motherboards on the market, which are using processors and co-processors that integrate cryptographic acceleration. The idea is to build a small diskless cluster based on this kind of motherboards, in order toscale up even more the existing acceleration. The concept of diskless cluster exists several years now and there are many open source tools, which could be used in order to build such a cluster. In our case, DRBL, TORQUE and MAUI were used for building a scalable crypto-cluster.

Of course, several important questions remain to be answered:

1. How much will the performance be increased ?
2. Does it worth to implement such an architecture for cryptography ?
3. At which point, we will be blocked by memory and ethernet limitations ?
4. ….

Even though that this approach may hides limitations, there are applications on which this infrastructure could be useful. The need for better performance at low cost is always present and especially for security areas such as forensics, cryptanalysis and popular encryption protocols, this kind of architecture might be promising.

Proof-of-concept: Download