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Building a Diskless Cluster

As my internship reaches to an end, I would like to thank Intel for hosting the dissertation for my master degree. During my stay here in Shannon, I found many new innovative directions that could be explored and I had the chance to extend/reveal my skills. Inspired from the field of computer security, with obvious influences from the area of cryptography, I discovered a personal paradise at Intel’s Lab.

How it started

In a nutshell, I built a multi-node diskless cluster that is controlled from a main board and it is able to schedule jobs in parallel. The interesting part comes from the fact that the entire approach is diskless and it shares only a single shared storage point, located at the main board. That in practice means that every processing on the nodes is done on the fly through the network and apparently the operating system is also loaded on the fly by using the Pre-Boot eXecution Environment (PXE) & Tftpboot.

How it finished

The idea behind the cluster was to explore the processing that we could obtain for general hashing operations. There are many open source tools for High Performance Computing and I was more than glad to explore them. Intel Shannon, significantly contributed to the entire project, since it provided me with all the necessary hardware toys and a high-tech lab to setup my system. I would like to personally thank the following people: Benne de WegerPadraic GarveyMichael HennesseyPierre LaurentSergio Borghese and Joseph Gasparakis.

Document:    “A Diskless Cluster Architecture for Hashing Operations”
Presentation:     “A Diskless Cluster Architecture for Hashing Operations (Pres)”

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A Scalable Cluster for Cryptography

Usually, cryptographic computations constitute a heavy bottleneck for almost any common processor unit. In order to overcome this drawback, new dedicated processors have been developed. By aiming mainly to accelerate the cryptographic operations and off-load the cryptographic workload from the main functionality of a processor, these processors achieve a much better performance at a low-per-watt power consumption. By embedding dedicated acceleration mechanisms into a common processor chip, the hardware once again is proved to be incomparable faster from any software approach. At the moment, there is a number of existing motherboards on the market, which are using processors and co-processors that integrate cryptographic acceleration. The idea is to build a small diskless cluster based on this kind of motherboards, in order toscale up even more the existing acceleration. The concept of diskless cluster exists several years now and there are many open source tools, which could be used in order to build such a cluster. In our case, DRBLTORQUE and MAUI were used for building a scalable crypto-cluster.

Of course, several important questions remain to be answered:

  1. How much will the performance be increased ?
  2. Does it worth to implement such an architecture for cryptography ?
  3. At which point, we will be blocked by memory and ethernet limitations ?
  4. ….

Even though that this approach may hides limitations, there are applications on which this infrastructure could be useful. The need for better performance at low cost is always present and especially for security areas such as forensicscryptanalysis and popular encryption protocols, this kind of architecture might be promising.

Proof-of-concept: Download

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